[wxc200]

Thanks a lot. Currently we can manage the hbr bits setting correctly at alsa hda side,but gfx side did not reflect hbr correctly. That's maybe caused by some wrong setting sequence,anyway I hope you can provide the output of intel-audio-dump to check pin status. Sorry I have no hdmi receiver handy to receive hbr formats audio.

I also ran intel-audio-dump (from git), this is the result:

http://pastebin.com/iubEkqJm

Note: I am on the latest drm-intel-next-queued branch, which includes 9a4b63e1ca943743ddb420611af5dcedbfb3953a, 7fc5be186fed4a782338a5feff5745c9c8190f75 and 1227d7f16b08bde70ac8afc71e5d47b610db77e3 (are these your commits, wxc200?).

If I can do anything else to help you, let me know.

Thanks your test. I have one Yamaha RX V571 which supports HBR stream testing now, so i can test my patch easily. About the patches, i used name "xingchao.wang@Intel.com".

Currently one clue is about HBR bits setting, another one is about N/CTS programming. Intel driver left the default values for TMDS clock and the HDMI spec has requirement to program N/CTS according to ASP type. There's one recommended talbe for various rates and TMDS clock(according to HDMI SPEC 1.3a, table 7.1). I'm doing more test based on that. I know little about the knowledge on this and how does that work on the enabled-HBR platform such as Nvidia's card. if anyone can share with me some infomation, i will appreciate that much.

thanks
--xingchao