For the people that are interested. A snipped from the quick reference manual.
CPU Sub-system
Quad core ARM Cortex-A5 CPU up to 1.5GHz (DVFS)
ARMv7 instruction set, power efficient architecture
32KB instruction cache and 32KB data cache
512KB Unified L2 cache
Advanced NEON and VFP co-processor
Advanced TrustZone security system
Application based traffic optimization using internal QoS-based switching fabrics
3D Graphics Processing Unit
Quad-core ARM Mali-450 GPU up to 600MHz+ (DVFS)
Dual Geometry Processors with 32KB L2 cache
Dual Pixel Processors with 128KB L2 caches
Concurrent multi-core processing
1200Mpix/sec and 132Mtri/sec
Full scene over-sampled 4X anti-aliasing engine with no additional bandwidth usage
OpenGL ES 1.1/2.0 and OpenVG 1.1 support
2.5D Graphics Processor
Fast bitblt engine with dual inputs and single output
Programmable raster operations (ROP)
Programmable polyphase scaling filter
Supports multiple video formats 4:2:0, 4:2:2 and 4:4:4 and multiple pixel formats (8/16/24/32 bits graphics layer)
Fast color space conversion
Advanced anti-flickering filter
Crypto Engine
Supports AES block cipher with 128/192/256 bits keys, standard 16 bytes block size and streaming ECB, CBC and CTR modes
Supports DES/3DES block cipher with ECB and CBC modes supporting 64 bits key for DES and 192 bits key for 3DES
Built-in LSFR Random number generator
Video/Picture CODEC
Amlogic Video Engine (AVE) with dedicated hardware decoders and encoders
Hardware based trusted video path (TVP)
Supports multiple “secured” video decoding sessions and simultaneous decoding and encoding
Video/Picture Decoding
o H.265 HEVC
[email protected] up to 1080P@60fps
o H.264 AVC
[email protected] up to 1080P@60fps
o H.264 MVC up to 1080P@60fps
o MPEG-4 ASP@L5 up to 1080P@60fps (ISO-14496)
o WMV/VC-1 SP/MP/AP up to 1080P@60fps
o AVS JiZhun Profile up to 1080P@60fps
o MPEG-2 MP/HL up to 1080P@60fps (ISO-13818)
o MPEG-1 MP/HL up to 1080P@60fps (ISO-11172)
o RealVideo 8/9/10 up to 1080P@60fps
o WebM up to VGA
o Multiple language and multiple format sub-title video support
o MJPEG and JPEG unlimited pixel resolution decoding (ISO/IEC-10918)
o Supports JPEG thumbnail, scaling, rotation and transition effects
o Supports *.mkv,*.wmv,*.mpg, *.mpeg, *.dat, *.avi, *.mov, *.iso, *.mp4, *.rm and *.jpg file formats
Video/Picture Encoding
o Independent JPEG and H.264 encoder with configurable performance/bit-rate
o JPEG image encoding
o H.264 video encoding up to 1080P@30fps
Video Post-Processing Engine
Motion adaptive 3D noise reduction filter
Advanced motion adaptive edge enhancing de-interlacing engine
3:2 pull-down support
Programmable poly-phase scalar for both horizontal and vertical dimension for zoom and windowing
Programmable color management filter (to enhance blue, green, red, face and other colors)
Dynamic Non-Linear Luma filter
Programmable color matrix pipeline
Video mixer: 2 video planes and 2 graphics planes per video output
Video Output
Built-in HDMI 1.4b transmitter including both controller and PHY with CEC and HDCP, 1200p@60 max resolution output
CVBS 480i/576i standard definition output
Supports all standard SD/HD/FHD video output formats: 480i/p, 576i/p, 720p, and 1080i/p
Supports 3D HDMI display
Audio Decoder and Input/Output
Supports MP3, AAC, WMA, RM, FLAC, Ogg and programmable with 5.1 down-mixing
I2S audio interface supporting 2-channel input/output
Built-in serial digital audio SPDIF/IEC958 output and PCM input/output
Supports concurrent dual audio stereo channel output with combination of I2S+PCM
Memory and Storage Interface
16/32-bit SDRAM memory interface running up to DDR1600
Supports up to 2GB DDR3, DDR3L with single rank and LPDDR2, LPDDR3 with dual ranks
TrustZone protected DRAM memory region and internal SRAM
Supports SLC/MLC/TLC NAND Flash with 60-bit ECC, compatible to ONFI 2.1 and Toggle 2.0 mode
SDSC/SDHC/SDXC card and SDIO interface with 1-bit and 4-bit data bus width supporting spec version 2.x/3.x/4.x DS/HS modes up to UHS-I SDR50
eMMC and MMC card interface with 1/4/8-bit data bus width supporting spec version 4.4x/4.5x HS200 (up to 100MHz clock), compatible with standard iNAND interface
Supports serial 1, 2 or 4-bit NOR Flash via SPI interface
Built-in 4k bits One-Time-Programming ROM for key storage
Network
Integrated IEEE 802.3 10/100/1000 Gigabit Ethernet controller with RMII/RGMII interface
Supports Energy Efficiency Ethernet (EEE) mode
Optional 50MHz and 125MHz clock output to Ethernet PHY
WiFi/IEEE802.11 & Bluetooth supporting via SDIO/USB/UART/PCM
Digital Television Interface
Transport stream (TS) input interface with built-in demux processor for connecting to external digital TV tuner/demodulator
Built-in PWM, I2C and SPI interfaces to control tuner and demodulator
Integrated ISO 7816 smart card controller
Integrated I/O Controllers and Interfaces
Dual USB 2.0 high-speed USB I/O, one USB Host and one USB OTG
5 UART, 5 I2C and 1 SPI interface with 3 slave selects
Five PWMs
Programmable IR remote input/output controllers
Built-in 10bit SAR ADC with 2 input channels
A set of General Purpose IO interfaces with built-in pull up and pull down
System, Peripherals and Misc. Interfaces
Integrated general purpose timers, counters, DMA controllers
Integrated RTC with battery backup option
24 MHz and 32 KHz crystal oscillator input
Embedded debug interface using ICE/JTAG
Power Management
Multiple external power domains controlled by PMIC
Multiple internal power domains controlled by software
Multiple sleep modes for CPU, system, DRAM, etc.
Multiple internal PLLs for DVFS operation
Multi-voltage I/O design for 1.8V and 3.3V
Power management auxiliary processor in dedicated always-on (AO) power domain to communicate with external PMIC
Security
Trustzone based Trusted Execution Environment (TEE)
Secured boot, OTP, internal control buses and storage
Protected memory regions and scrambled memory data interface
Trusted Video Path and Secured (needs SecureOS software)
OpenELEC already runs on Almost all Amlogic devices. (Meson3 currently being worked on as back support)
https://github.com/codesnake/OpenELEC.tv
The Amlogic devices are all a little bit different, but a proper Amlogic project folder and devices system is ready at Alex his github account. It is being prepared to be PR-ed to mainline OpenELEC, but they are currrently a bit busy with i.MX6 first. The will look at it after that (I have been told)